Technical Capability

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    14-Jul-2015

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<ul><li><p>TECHNICAL CAPABILITY</p></li><li><p>Thru hole : Aspect ratio =&lt; 14 Drilling diameter 150 Materials (RoHS) : High Tg epoxy (Tg 175C) completely compatible RoHS (Filler et phenolic hardener) Materials for high frequencies (4 to 15 GHz) Green materials (Halogen free) Low deformation materials (X,Y,Z)Lines &amp; spacing : AOI check Clean room classe 100 40 lines / 60 spacingLaser vias : Sequential multilayers (3 levels) Stacked Microvias Laser Holes 75 Finishes : Electroless nickel-gold Electroless tin - OSP HASL- Fused tin-lead</p><p> Ionic contamination &lt; 0.3 g/cm2Blind vias : drilling 100 General capability</p></li><li><p>General capability</p><p>technologie</p><p>Today20092010</p><p>External lines and spacing75 / 85 60 / 75 50 / 70 </p><p>CMS minimum pitch200 200 200 </p><p>BGA minimum pitch300 250 200 </p><p>Drilled holes (D)</p><p>--&gt; board150 100 100</p><p>--&gt; laser via75 75 75 </p><p>Pad diameterD + 250 D + 220 D + 200 </p><p>Aspect ratio14:116:116:1</p><p>Internal lines and spacing60 / 80 50 / 75 40 / 60 </p><p>Base MaterialsHigh Tg Epoxy - Halogen free - Polyimide - BT epoxy - RogersHigh Tg Epoxy - Halogen free - Polyimide - BT epoxy - RogersHigh Tg Epoxy - Halogen free - Polyimide - BT epoxy - Rogers</p><p>TechnologySequential multilayers - laser vias 2 &amp; 3 levels - Stacked vias - Burried &amp; blind vias - Thermal drains- Rigid-flexSequential multilayers - laser vias 2 &amp; 3 levels - Stacked vias - Burried &amp; blind vias - Thermal drains- Rigid-flexSequential multilayers - laser vias 2 &amp; 3 levels - Stacked vias - Burried &amp; blind vias - Thermal drains- Rigid-flex</p></li><li><p>Technical investments</p></li><li><p>Technical investments</p></li><li><p>Reliability</p></li><li><p>12 layers 2.4 mm thickness8000 interconnected holes ( daisy chain)Drilled holes from 0.25 mm to 1.1 mmBGAs au pas de 1 et 1.27 mmCMS padsInternal connections at several levelsReliability : Process Control Board</p></li><li><p>Process Control Board</p><p>Production of 3 boards per week Base Materials control (Tg 175C) Plating Control (Electroless &amp; electrolytic copper baths) Thermal shocks and microsections : - 1 to 4*10s at 287 C on standard high Tg epoxy - 2 to 8*10s at 300 C on high Tg epoxy ROHS --&gt; Controls according to IPC A600 (classe 3) Advance detection of board failure modes Process and Material board qualification</p></li><li><p>Industrial designs &amp; examples</p><p>for high reliable boards</p></li><li><p>orBase materials : high Tg (175C) epoxy with fillers and phenolic hardener</p><p>ci rigide</p><p>() / mils</p><p>Board Thickness (Average)1600 to 2800</p><p>Laminate thickness (minimum with one or two copper plane layer)75 to 100</p><p>Laminate thickness (minimum with two signal layers)100 to 152</p><p>Internal line width75 to 100</p><p>External line width75 to 125</p><p>Drilled thru hole diameter&gt;= 200</p><p>Internal pad for thru holehole dia + 250 400</p><p>Internal spacing80 to 125</p><p>External spacing85 to 125</p><p>Insulation (hole/copperplane)Hole dia + 250 to 400 + 2* mini spacing +60 </p><p>Aspect ratio6 to 10</p><p>Caractristiques standards</p><p>Stratifi Log/Masse</p><p>152 </p><p>Stratifi Masse/Tension</p><p>102 </p><p>A</p><p>B</p><p>C</p><p>Trait interne</p><p>75 </p><p>Isolement interne</p><p>100 </p><p>E</p><p>F</p><p>G</p><p>Gnd / Pwr Clearance Diameter</p><p>36 mils</p><p>Trou enterr (Diamtre perc)</p><p>D</p><p>200 </p><p>H</p><p>I</p><p>J</p><p>K</p><p>L</p><p>M</p><p>250 </p><p>External Via Pad Diam. I + 10 mils</p><p>20 mils</p><p>Solder Mask Clearance Diam. J+8 mils</p><p>28 mils</p><p>Board Thickness ( Max )</p><p>120 mils</p><p>Ar &lt; = 8</p><p>Optimised Board Aspect Ratio L / I</p><p>127 </p><p>Trou total (Diamtre perc)</p><p>Pastille interne (trou enterr)</p><p>400 </p><p>Stratifi Log/Log</p><p>ci microvias</p><p>CaractristiquesValeurs ()</p><p>Epaisseur CI central (Typique)600 1000</p><p>Diamtre de perage du CI central200 300</p><p>Diamtre de perage microvias100 </p><p>Pastille externe microvia350 400</p><p>Pastille interne microvia300 350</p><p>Dilectrique microvia70</p><p>Pastille trou enterr400</p><p>Diamtre de perage trou enterr200</p><p>Trait interne75 100</p><p>Trait externe100 125</p><p>Diamtre de perage trou via total&gt;= 250</p><p>Pastille interne trou totalDia trou + 250 400</p><p>Isolement interne100 125</p><p>Isolement externe125 150</p><p>Epargne trou totalDia trou + 250 400 + 2* is. Mini.</p><p>Aspect ratio (microvias)== 250</p><p>Pastille interne trou totalDia trou + 250 400</p><p>Isolement interne100 125</p><p>Isolement externe125 150</p><p>Epargne trou totalDia trou + 250 400 + 2* is. Mini. +60 </p><p>Aspect ratio (CI total)8 9</p><p>"Intermediate board"</p><p>()</p><p>Thickness400 to 1500</p><p>Drilled hole diameter150 to 250</p><p>Aspect ratio4 8</p><p>Caractristiques standards</p><p>Stratifi Log/Masse</p><p>152 </p><p>Stratifi Masse/Tension</p><p>102 </p><p>A</p><p>B</p><p>C</p><p>Trait interne</p><p>75 </p><p>Isolement interne</p><p>100 </p><p>E</p><p>F</p><p>G</p><p>Gnd / Pwr Clearance Diameter</p><p>36 mils</p><p>Trou enterr (Diamtre perc)</p><p>D</p><p>200 </p><p>H</p><p>I</p><p>J</p><p>K</p><p>L</p><p>M</p><p>250 </p><p>External Via Pad Diam. I + 10 mils</p><p>20 mils</p><p>Solder Mask Clearance Diam. J+8 mils</p><p>28 mils</p><p>Board Thickness ( Max )</p><p>120 mils</p><p>Ar &lt; = 8</p><p>Optimised Board Aspect Ratio L / I</p><p>127 </p><p>Trou total (Diamtre perc)</p><p>Pastille interne (trou enterr)</p><p>400 </p><p>Stratifi Log/Log</p><p>ci microvias</p><p>CaractristiquesValeurs ()</p><p>Epaisseur CI central (Typique)600 1000</p><p>Diamtre de perage du CI central200 300</p><p>Diamtre de perage microvias100 </p><p>Pastille externe microvia350 400</p><p>Pastille interne microvia300 350</p><p>Dilectrique microvia70</p><p>Pastille trou enterr400</p><p>Diamtre de perage trou enterr200</p><p>Trait interne75 100</p><p>Trait externe100 125</p><p>Diamtre de perage trou via total&gt;= 250</p><p>Pastille interne trou totalDia trou + 250 400</p><p>Isolement interne100 125</p><p>Isolement externe125 150</p><p>Epargne trou totalDia trou + 250 400 + 2* is. Mini.</p><p>Aspect ratio (microvias)== 250</p><p>Pastille interne trou totalDia trou + 250 400</p><p>Isolement interne100 125</p><p>Isolement externe125 150</p><p>Epargne trou totalDia trou + 250 400 + 2* is. Mini. +60 </p><p>Aspect ratio (CI total)8 9</p><p>CI intermdiaire</p><p>CaractristiquesValeurs ()</p><p>Epaisseur400 1000</p><p>Diamtre de perage200 300</p><p>Aspect ratio (CI total)5 6</p><p>Base Copper Thickness</p><p>Layers()</p><p>Externals9 to 18</p><p>Signal inner18 to 35</p><p>Copper plane inner18 to 70</p><p>Caractristiques standards</p><p>Stratifi Log/Masse</p><p>152 </p><p>Stratifi Masse/Tension</p><p>102 </p><p>A</p><p>B</p><p>C</p><p>Trait interne</p><p>75 </p><p>Isolement interne</p><p>100 </p><p>E</p><p>F</p><p>G</p><p>Gnd / Pwr Clearance Diameter</p><p>36 mils</p><p>Trou enterr (Diamtre perc)</p><p>D</p><p>200 </p><p>H</p><p>I</p><p>J</p><p>K</p><p>L</p><p>M</p><p>250 </p><p>External Via Pad Diam. I + 10 mils</p><p>20 mils</p><p>Solder Mask Clearance Diam. J+8 mils</p><p>28 mils</p><p>Board Thickness ( Max )</p><p>120 mils</p><p>Ar &lt; = 8</p><p>Optimised Board Aspect Ratio L / I</p><p>127 </p><p>Trou total (Diamtre perc)</p><p>Pastille interne (trou enterr)</p><p>400 </p><p>Stratifi Log/Log</p><p>ci microvias</p><p>CaractristiquesValeurs ()</p><p>Epaisseur CI central (Typique)600 1000</p><p>Diamtre de perage du CI central200 300</p><p>Diamtre de perage microvias100 </p><p>Pastille externe microvia350 400</p><p>Pastille interne microvia300 350</p><p>Dilectrique microvia70</p><p>Pastille trou enterr400</p><p>Diamtre de perage trou enterr200</p><p>Trait interne75 100</p><p>Trait externe100 125</p><p>Diamtre de perage trou via total&gt;= 250</p><p>Pastille interne trou totalDia trou + 250 400</p><p>Isolement interne100 125</p><p>Isolement externe125 150</p><p>Epargne trou totalDia trou + 250 400 + 2* is. Mini.</p><p>Aspect ratio (microvias)=</p></li><li><p>BGA from 0.8 to 1 mm pitch</p></li><li><p>Blind holesThru holesBGA at 1 mm pitch (1500 boules)</p></li><li><p>Main technology in the case of large BGAs (number of balls from 800 to 1800) Main markets : Avionics, Military, Industriel, big computersEvolutions : high number of layers (+ 40% in 4 years)</p><p>Base copper thickness of 35 (Low voltage ; differential signals)</p><p>Controlled impedances</p><p> Sequential boards</p></li><li><p> High Density PCBsDesigns &amp; examples</p><p>for HDI boards</p><p>(Advanced technology)</p></li><li><p> High Density PCBsThe packaging orientation is mainly due to : </p><p>- the market segment (consumer vs professional...)</p><p>- the BGA pitch</p><p>- the matrix size (number of balls)</p><p>- the electrical constraints (impedance, signal quality ...)</p><p>- the assembly constraints (thermal shocks, finishes ...)</p></li><li><p> High Density PCBsBGA at 0.5 to 0.3 mm pitch</p></li><li><p> High Density PCBsBGA at 0.5 mm pitch without lines between pads</p></li><li><p> High Density PCBsExampleThru holes drilled at 0.25 mm</p><p>Laserholes drilled at 0.1 mm</p><p>100 lines</p><p>Thickness : 1 mm</p><p>BGA pitch 0.5 mmExternal LayerInternal Layer</p></li><li><p> High Density PCBsBGA at 0.5 mm pitch with one line between 2 pads</p></li><li><p> High Density PCBsBGA at 0.4 mm pitch with one line between 2 pads</p></li><li><p> High Density PCBsBGA at 0.3 mm pitch without lines between pads</p></li><li><p> High Density PCBsMain packaging when BGA pitch =&lt; 0.5 mm Main markets : communication and/or handled Electronic devices (mobile phones, Bluetooth, PDA ...)Future : high packages matrix (more balls)stacked viasLess total plated thru holesthinner lines &amp; spacing</p></li><li><p> High Density PCBsAdvanced technology forSpecific Needs (close to silicon devices)</p></li><li><p> High Density PCBs</p></li><li><p> High Density PCBs BGA at 0.5 mm pitch : one line between 2 pads sequential boardDrilled holes at 15060 lines</p></li><li><p> High Density PCBsDouble sided board : - Flip-chip at 250 pitch - 165 pad - Drilling at 100 - Base material : Hitachi 679F</p></li><li><p> High Density PCBs</p></li><li><p> High Density PCBs58 55 30 35 45 90 110 External line with Nickel &amp; GoldInner lineInner line100 drilled hole</p></li><li><p> High Density PCBs</p></li></ul>