รายงาน DRAM และ SRAM - Know2pro.com

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DRAM SRAM - Know2pro.com

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1 (RAM: Random Access Memory) ) (RAM) (Volatine) RAM

RAM (Random Access Memory)

1. Static Random Access Memory ( SRAM ) SRAM DRAM Refresh DRAM Refresh SRAM SRAM

flip-flop bits

( Cache )

2

1.1 Block Diagram SRAM

3

1.2 CPU 2 4 Cache SRAM

SRAM

1. Transistor

- BJT (Bipolar Junction Transistor) TTL - MOSFET (metaloxidesemiconductor field-

effect transistor) CMOS 2. Function in data out Address

- Asynchronous Clock Frequency data - Synchronous (Timing) clock. Address, Data in Clock Signal

3.

- ZBT (ZBT stands for zero bus turnaround)

turnaround Clock Cycle

4 latency read - syncBurst (syncBurst SRAM or synchronousburst SRAM) synchronous SRAM burst - DDR SRAM Synchronous, single write cycle 0

read/write port( 2 )

1 ),double data rate IO ( - Quad Data Rate SRAM Synchronous,

seperate read/write port( ),double data rate IO ( 2 )

SRAM

-

(Static Random Access Memory (SRAM)) Flip-Flop Transistor 6 " 0 " " 1 " 2

( Flip Flops ) SRAM Transistor 6 DRAM cell Transistor 1 Capacitor 1

5

1.3 A six-transistor CMOS SRAM cell. Read Write SRAM

1.4 SRAM Read Operation

6

1.5 SRAM Write Operation

SRAM

1.6 SRAM Write-Read Operation

- DRAM Transistor

- Refresh -

7 - SRAM DRAM Flip- DRAM - / cache Flop

SRAM

DRAM SRAM DRAM (Capaciter) refresh refresh refresh Dynamic Random Access Memory

2. Dynamic Random Access Memory ( DRAM )

SRAM SRAM DRAM (

DRAM

DRAM 512 Mbit )

8

2.1 Block Diagram DRAM(Toshiba)

9

DRAM (DRAM)

2.2 DRAM

" 0 " " 1 " ( Refresh ) ( Charge )

DRAM ( (Capacitor)) (Transistor) ( Discharge ) DRAM ( Re-charge )

2.3 DRAM

10

2.4 DRAM Cell

- (ROW) (Column) DRAM

2.5 Capacitor Charge and Discharge Timing Random Access

11

2.6 DRAM

2.7 DRAM Cell

12 Read-Write DRAM

2.8 SDRAM Read Access Timing (Left) Precharge and Activation (Right)

13

2.9 Principle of operation of DRAM read, for simple 4 by 4 array. (Left)

14 Principle of operation of DRAM Write, for simple 4 by 4 array. (Right)

RAM

RAM

RAM

1. 2. Din 3. (write access time) /CE

4. R/W R/W RAM

15 RAM

RAM 1. RAM RAM

2. R/W 1 0 0 1 3. (read access time) /CE 4. Dout 4 ROM

RAM

16 DRAM FPM Ram (Fast Page Mode DRAM

)

486 FPM Fast Page DRAM (FPM) DRAM DRAM 6-3-3-3 (Latency) 3 clock 3 clock page) 32 bit bit 200 MB

FPM Fast Page Mode DRAM

100 MB 64 - EDO DRAM (Extended Data Out DRAM)

EDO 72 Pin SIMM ( Single Inline Memory Module ) 32

DRAM

17 64 - SDRAM (Synchronous Dynamic RAM)

1 SDRAM MHz SDRAM (DDR) SDRAM) - DDR SDRAM SDRAM II (Double Data Rate 66 MHz, 100 MHz 133

64

DIMM ( Dual Inline Memory Module )

168 Pin

Synchronous DRAM SDRAM Rambus DDR SDRAM 128 MB DIMM SDRAM DDR 2 DDR SDRAM

DDR SDRAM Double Data Rate

SDRAM 184 Pin

18 Rambus DRAM DDR SDRAM 3 PC1600, PC2100 PC2700

200 MHz, 266 MHz 333 MHz DDR SDRAM - RDRAM (Rambus DRAM)

Rambus Intel 184 Pin RDRAM

400 MHz 800 MHz Rambus Module Pentium 4 RIMM Rambus Inline Memory 3

Intel i850

19

2.10 DRAM

2.11 DRAM

DRAM - SRAM

20 - SRAM - - ( 800 MHz) - (Refresh) ( DRAM ) Refresh - SRAM 1 2 GB DDR3

21

(RAM). (11 2552). Available URL: . (11 2552). Available URL: Random-Access Memory (RAM) .(11 2552).

http://www.bcoms.net/hardware/ram.asp http://th.wikipedia.org/wiki/RAM Available URL: c1.htm#04 URL:

http://www.sec.psu.ac.th/download/mculab/mcu_html/Micro_spe 3 .(11 2552). Available

http://std.kku.ac.th/4930501912/kai/contents/data-03.html Available URL:

ZDNet Definition for: Memory Types.(11 2552).

http://dictionary.zdnet.com/definition/memory+types.html

http://saramagazine.blogspot.com/2008_08_01_archive.html Available URL: Commodity Hardware Today.(11 2552).

.(11 2552). Available URL:

http://lwn.net/Articles/250753/ Available URL:

Static random access memory.(11 2552).

http://en.wikipedia.org/wiki/Static_random_access_memory

22 Available URL: Dynamic random access memory.(11 2552).

http://en.wikipedia.org/wiki/Dynamic_random_access_memory