ЭЛЕКТРОННАЯ БИБЛИОТЕЧНАЯ СИСТЕМАelib.psuti.ru/Arhitektura_vytchislit_sistem_konspekt...2015-05-28ЛЕКЦИЯ 1. 13 ТЕМА 1 ... ОРГАНИЗАЦИЯ ПАМЯТИ ВЫЧИСЛИТЕЛЬНЫХ СИСТЕМ 90 9.1. ... Понятия ЭВМ и ВС 1.1. Понятия ЭВМ и ВС ЭВМ (Computer,

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  • 2

    ( ):

    230105

    - 2013

  • 3

    621.391

    .., ..

    . . - .:

    , 2013. - 234 .

    ,

    ,

    ;

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    230105

    :

    .. - ..-....,

    .

    .., .., 2013

  • 4

    8

    11

    1. 13

    1. . 13

    1.1. 13

    1.2. 13

    1.3. . 14

    1.4. 15

    1.5. 16

    2. 17

    2. 18

    2.1. 18

    2.2. 20

    2.3. 19

    2.4. - 20

    2.5. 22

    3. 30

    3. . CISC RISC

    30

    3.1. 30

    3.2. 28

    3.3. CISC RISC 29

    3.4. 31

    4. 36

    4. 37

    4.1. VLIW 40

    4.2. EPIC 42

    4.3. IA-64 43

    4.4. INTEL ITANIUM 46

    5. 61

    5. 61

    5.1. 61

    5.2. 49

    5.3. 52

    5.4. 53

    5.5. 71

    6. 57

  • 5

    6. 57

    6.1.

    57

    6.2. 77

    6.3. . 63

    6.4. () 66

    6.5. 68

    6.6. . .

    93

    6.7. 72

    7. 102

    7. .

    102

    7.1. 102

    7.2. . .

    . 77

    7.3. 79

    7.4. 80

    8. 82

    8. 82

    8.1. . .

    82

    8.2.

    84

    8.3. . .

    87

    9. 90

    9. 90

    9.1. 90

    9.2. 91

    9.3. 91

    9.4. (SMP) .

    UMA, COMA, NUMA 93

    10. 98

    10. -

    98

    10.1. 98

    10.2. 99

    10.3. PVP- 100

    10.4. 101

  • 6

    10.5. - - 103

    10.6. 104

    10.7. 104

    10.8. 106

    10.9. 107

    11. 109

    11. 109

    11.1. 111

    11.2. 111

    11.3. 112

    11.4. 114

    11.5. 115

    11.6. 116

    12. 162

    12.

    162

    12.1. 118

    12.2. 121

    12.3. 122

    13. 126

    13. MPP- 126

    13.1. 129

    13.2. (MPP-) 132

    14. 136

    14. 136

    14.1. 136

    14.2. 138

    15. 140

    15. 140

    15.1. 140

    15.2. 141

    15.3. 142

    15.4. 201

    16. 203

    16. OSI 203

    16.1. OSI 203

    16.2. (APPLICATION LAYER) 208

    16.3. (PRESENTATION LAYER) 150

  • 7

    16.4. (SESSION LAYER) 151

    16.5. (TRANSPORT LAYER) 152

    17. 216

    17.1. (NETWORK LAYER) 154

    17.2. (DATA LINK) 155

    17.3. (PHYSICAL LAYER) 157

    17.4. 159

    17.5. 160

    161

    162

  • 8

    ALU Arithmetic Logic Unit

    ASP Application-Specific Processor

    BSP Burroughs Scientific Processor

    CISC Complete Instruction Set Computer

    COMA Cacheonly Memory Architecture

    COW Cluster of Workstattions

    CPI Cycles Per Instruction

    CPU Central Processing Unit

    CTR Cut-Through Routing

    DSM Distributed Shared Memory

    DSP Digital Signal Processor

    EDSAC Electronic Delay Storage Automatic Computer

    EDVAC Electronic Discrete Variable Automatic Computer

    ENIAC Electronic Numerical Integrator and Computer

    EPIC Explicitly Parallel Instruction Computing

    FIFO First In, First Out

    GPP General-Purpose Preprocessor

    HPF High Perfomance Fortran

    IA Intel Architecture

    IEEE Institute of Electrical and Electronics Engineers

    ILP Instruction Level Parallelism

    ISA Industrial Standard Architecture

    LSI Large-Scale Integration

    MIMD Multiple Instruction stream, Multiple Data stream

    MISD Multiple Instruction stream, Single Data stream

    MMX Multimedia Extensions

    MPI Message Passing Interface

    MPP Massively Parallel Processing

    NORMA NO Remote Memory Access

    NUMA Non Uniform Memory Access

    PVM Parallel Virtual Machines

    PVP Player Versus Player

    RAID Redundant Array of Independent Disks

    RAM Random access memory

    RISC Restricted (reduced) Instruction Set Computer

    ROSC Removed Operand Set Computer

    SIMD Single Instruction, Multiple Data

    SISD Single Instruction, Single Data

    SMP Symmetric Multiprocessor

    SMT Simultaneous Multi-Threading

    SSE Streaming SIMD Extensions

    TCP Transmission Control Protocol

    TFLOPS Floating-Point Operations Per Second

  • 9

    TRAC Texas Reconfigurable Array Computer

    UDP User Datagram Protocol

    UMA Uniform Memory Access

    VLIW Very Long Instruction Word

    VLSI Very Large-Scale Integration

    -

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  • 10

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  • 13

    1.

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  • 14

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  • 16

    1.3.

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  • 17

    1.2.

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  • 18

    2.

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    19 1965 ., Electronics (vol. 39, 8)

    (Gordon Moore) Cramming more components onto integrated circuits

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  • 19

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  • 20

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  • 21

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  • 22

    2.5.

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